TraPL
Author:
Affiliation:
1. University of Wisconsin, Madison
Funder
National Science Foundation
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3061639.3062335
Reference17 articles.
1. Olympus-SoC: Place and route for advanced node designs. Olympus-SoC: Place and route for advanced node designs.
2. Track assignment
3. ISPD 2015 Benchmarks with Fence Regions and Routing Blockages for Detailed-Routing-Driven Placement
4. What makes a design difficult to route
5. Non-slicing floorplanning-based crosstalk reduction on gridless track assignment for a gridless routing system with fast pseudo-tile extraction
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1. Track Assignment Using Gradient Indication and Simulated Annealing;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03
3. Circuit Routing Using Monte Carlo Tree Search and Deep Reinforcement Learning;2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT);2022-04-18
4. TRADER: A Practical Track-Assignment-Based Detailed Router;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14
5. Detailed Routing Short Violation Prediction Using Graph-Based Deep Learning Model;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-02
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