How the common retention acceleration method of 3D NAND flash memory goes wrong?

Author:

Li Qiao1,Ye Min1,Kuo Tei-Wei2,Xue Chun Jason1

Affiliation:

1. City University of Hong Kong

2. City University of Hong Kong, National Taiwan University

Funder

Research Grants Council of the Hong Kong Special Administrative Region, China

Publisher

ACM

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Characterizing and Optimizing LDPC Performance on 3D NAND Flash Memories;ACM Transactions on Architecture and Code Optimization;2024-09-14

2. Modeling Retention Errors of 3D NAND Flash for Optimizing Data Placement;ACM Transactions on Design Automation of Electronic Systems;2024-06-21

3. Random Flip Bit Aware Reading for Improving High-Density 3-D NAND Flash Performance;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

4. Read Disturb and Reliability: The Complete Story for 3D CT NAND Flash;2023 IEEE 12th Non-Volatile Memory Systems and Applications Symposium (NVMSA);2023-08

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