Complementary communication path for energy efficient on-chip optical interconnects
Author:
Affiliation:
1. Lyon Institute of Nanotechnology, Ecully, France
2. Univ. Grenoble Alpes, Grenoble, France and CEA, LETI, MINATEC Campus, Grenoble, France
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2744769.2744810
Reference14 articles.
1. Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors
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4. Design Space Exploration of Stochastic Computing Architectures Implemented Using Integrated Optics;IEEE Transactions on Emerging Topics in Computing;2021-10-01
5. A Reliability-Aware Joint Design Method of Application Mapping and Wavelength Assignment for WDM-Based Silicon Photonic Interconnects on Chip;IEEE Access;2020
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