Juxtaposing Vivado Design Flows in Batch Mode

Author:

Dadaliaris Antonios1,Tragoudaras Antonios2,Kranas George1,Dossis Michael3,Dimitriou Georgios1

Affiliation:

1. Computer Science & Telecommunications Dept., University of Thessaly, Greece

2. Electrical & Computer Engineering Dept., University of Thessaly, Greece

3. Computer Science Dept., University of Western Macedonia, Greece

Publisher

ACM

Reference18 articles.

1. [n.d.]. Vivado Design Suite Tcl Command Reference Guide. http://www.xilinx.com/content/dam/xilinx/support/documentation/sw_manuals/xilinx2020_1/ug835-vivado-tcl-commands.pdf [n.d.]. Vivado Design Suite Tcl Command Reference Guide. http://www.xilinx.com/content/dam/xilinx/support/documentation/sw_manuals/xilinx2020_1/ug835-vivado-tcl-commands.pdf

2. Christoph Albrecht . 2005 . IWLS 2005 benchmarks. In International Workshop for Logic Synthesis (IWLS): http://www. iwls. org. Christoph Albrecht. 2005. IWLS 2005 benchmarks. In International Workshop for Logic Synthesis (IWLS): http://www. iwls. org.

3. Luca Amarú , Pierre-Emmanuel Gaillardon , and Giovanni De Micheli . 2015 . The EPFL combinational benchmark suite . In Proceedings of the 24th International Workshop on Logic & Synthesis (IWLS). Luca Amarú, Pierre-Emmanuel Gaillardon, and Giovanni De Micheli. 2015. The EPFL combinational benchmark suite. In Proceedings of the 24th International Workshop on Logic & Synthesis (IWLS).

4. FPGA-Based Soft-Core Processors for Image Processing Applications

5. Predictable Vision for Autonomous Systems

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