Edge-TM

Author:

Papagiannopoulou Dimitra1,Marongiu Andrea2,Moreshet Tali3,Herlihy Maurice4,Bahar R. Iris4

Affiliation:

1. University of Massachusetts Lowell, Lowell, MA

2. ETH Zurich, Zurich, Switzerland

3. Boston University, Boston, MA

4. Brown University, Providence, RI

Abstract

Scaling of semiconductor devices has enabled higher levels of integration and performance improvements at the price of making devices more susceptible to the effects of static and dynamic variability. Adding safety margins (guardbands) on the operating frequency or supply voltage prevents timing errors, but has a negative impact on performance and energy consumption. We propose Edge-TM , an adaptive hardware/software error management policy that ( i ) optimistically scales the voltage beyond the edge of safe operation for better energy savings and ( ii ) works in combination with a Hardware Transactional Memory (HTM)-based error recovery mechanism. The policy applies dynamic voltage scaling (DVS) (while keeping frequency fixed) based on the feedback provided by HTM, which makes it simple and generally applicable. Experiments on an embedded platform show our technique capable of 57% energy improvement compared to using voltage guardbands and an extra 21-24% improvement over existing state-of-the-art error tolerance solutions, at a nominal area and time overhead.

Funder

NSF

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Energy-Quality Scalable Integrated Circuits and Systems: Continuing Energy Scaling in the Twilight of Moore’s Law;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2018-12

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