Author:
Takagi Masamichi,Hiraki Kei
Cited by
12 articles.
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1. Designing a Deep Neural Network engine for LLC block reuse prediction to mitigate Soft Error in Multicore;Microelectronics Reliability;2024-05
2. Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor;Microprocessors and Microsystems;2023-09
3. ACIC: Admission-Controlled Instruction Cache;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02
4. Effective Mimicry of Belady’s MIN Policy;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04
5. Applying Deep Learning to the Cache Replacement Problem;Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture;2019-10-12