SPMPool

Author:

Tajik Hossein1,Donyanavard Bryan1,Dutt Nikil1,Jahn Janmartin2,Henkel Jörg2

Affiliation:

1. University of California, Irvine, CA

2. Karlsruhe Institute of Technology, Germany

Abstract

Distributed Scratchpad Memories (SPMs) in embedded many-core systems require careful selection of data placement to achieve good performance. Applications mapped to these platforms have varying memory requirements based on their runtime behavior, resulting in under- or overutilization of the local SPMs. We propose SPMPool to share the available on-chip SPMs on many-cores among concurrently executing applications in order to reduce the overall memory access latency. By pooling SPM resources, we can assign underutilized memory resources, due to idle cores or low memory usage, to applications dynamically. SPMPool is the first workload-aware SPM mapping solution for many-cores that dynamically allocates data at runtime—using profiled data—to address the unpredictable set of concurrently executing applications. Our experiments on workloads with varying interapplication memory intensity show that SPMPool can achieve up to 76% reduction in memory access latency for configurations ranging from 16 to 256 cores, compared to the traditional approach that limits executing cores to use their local SPMs.

Funder

NSF Variability Expedition

German Research Foundation (DFG) as part of the Transregional Collaborative Research Centre Invasive Computing

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Reflecting on Self-Aware Systems-on-Chip;A Journey of Embedded and Cyber-Physical Systems;2020-07-31

2. System management recovery in NoC-based many-core systems;Analog Integrated Circuits and Signal Processing;2020-03-12

3. SAM: Software-Assisted Memory Hierarchy for Scalable Manycore Embedded Systems;IEEE Embedded Systems Letters;2017-12

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