Speculator

Author:

Mambretti Andrea1,Neugschwandtner Matthias2,Sorniotti Alessandro2,Kirda Engin1,Robertson William1,Kurmus Anil2

Affiliation:

1. Northeastern University

2. IBM Research - Zurich, Rueschlikon, Switzerland

Funder

ONR

National Science Foundation (NSF)

Publisher

ACM

Reference54 articles.

1. 2009. Performance Analysis Guide for Intel Core i7 Processor and Intel Xeon Processors. https://software.intel.com/sites/products/collateral/hpc/vtune/performance_analysis_guide.pdf. 2009. Performance Analysis Guide for Intel Core i7 Processor and Intel Xeon Processors. https://software.intel.com/sites/products/collateral/hpc/vtune/performance_analysis_guide.pdf.

2. 2017. Preliminary Processor Programming Reference (PPR) for AMD Family 17h Models 00h-0Fh Processors. http://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf. 2017. Preliminary Processor Programming Reference (PPR) for AMD Family 17h Models 00h-0Fh Processors. http://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf.

3. 2018. Analysis and mitigation of speculative store bypass. https://blogs.technet.microsoft.com/srd/2018/05/21/analysis-and-mitigation-of-speculative-store-bypass-cve-2018-3639/. 2018. Analysis and mitigation of speculative store bypass. https://blogs.technet.microsoft.com/srd/2018/05/21/analysis-and-mitigation-of-speculative-store-bypass-cve-2018-3639/.

4. 2018. Intel Architectures Optimization Reference Manual. https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf. 2018. Intel Architectures Optimization Reference Manual. https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf.

5. 2018. Intel Software Developer Manual. https://software.intel.com/en-us/articles/intel-sdm. 2018. Intel Software Developer Manual. https://software.intel.com/en-us/articles/intel-sdm.

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CuMONITOR: Continuous Monitoring of Microarchitecture for Software Task Identification and Classification;Digital Threats: Research and Practice;2024-09-14

2. ReminISCence: Trusted Monitoring Against Privileged Preemption Side-Channel Attacks;Lecture Notes in Computer Science;2024

3. PMU-Spill: A New Side Channel for Transient Execution Attacks;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-12

4. Exploration and Exploitation of Hidden PMU Events;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

5. You Cannot Always Win the Race: Analyzing mitigations for branch target prediction attacks;2023 IEEE 8th European Symposium on Security and Privacy (EuroS&P);2023-07

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