Exploiting Chip Idleness for Minimizing Garbage Collection—Induced Chip Access Conflict on SSDs

Author:

Gao Congming1,Shi Liang2,Di Yejia2,Li Qiao2,Xue Chun Jason3,Wu Kaijie4,Sha Edwin4

Affiliation:

1. College of Computer Science, Chongqing University, Chongqing, People's Republic of China, Chongqing, China

2. College of Computer Science, Chongqing University, Chongqing, People's Republic of China

3. Department of Computer Science, City University of Hong Kong, Kowloon, Hong Kong

4. College of Computer Science, Chongqing University, Chongqing, People’s Republic of China

Abstract

Solid state drives (SSDs) are normally constructed with a number of parallel-accessible flash chips, where host I/O requests are processed in parallel. In addition, there are many internal activities in SSDs, such as garbage collection and wear leveling induced read, write, and erase operations, to solve the issues of inability of in-place updates and limited lifetime. When internal activities are triggered on a chip, the chip will be blocked. Our preliminary studies on several workloads show that when internal activities are frequently triggered, the host I/O performance will be significantly impacted because of the access conflict between them. In this work, in order to improve the access conflict induced performance degradation, a novel access conflict minimization scheme is proposed. The basic idea of the scheme is motivated by an interesting observation in SSDs: several chips are idle when other chips are busy with internal activities and host I/O requests. Based on this observation, we propose to schedule internal activities induced operations for minimized access conflict by exploiting the idleness of the multiple chips of SSDs. This approach is realized by two steps: First, read internal activities accessed data to the controller; second, by exploiting the idle chips during internal activities, write internal activities accessed data back to these idle chips. With this scheme, the internal activities can be processed with minimized access conflict to the host requests. Simulation results show that the proposed approach significantly reduces the access conflict, and in turn leads to a significant performance improvement of SSDs.

Funder

National 863 Programs

NSFC

Fundamental Research Funds for the Central Universities

Huawei Innovation Research Program

Fundamental Research Funds for Graduate Scientific Research and Innovation Foundation of Chongqing, China

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

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1. Re-aligning Across-page Requests for Flash-based Solid-state Drives;Proceedings of the 52nd International Conference on Parallel Processing;2023-08-07

2. DAC: A dynamic active and collaborative cache management scheme for solid state disks;Journal of Systems Architecture;2023-07

3. Pgc: An Efficient Parallel Garbage Collection Scheme Based on Hot and Cold Data Separation;2023

4. Delaying Large Write Requests to Trade off I/O Performance and Long-tail Latency in SSDs;2022 IEEE 24th Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2022-12

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