RIFFA 2.1

Author:

Jacobsen Matthew1,Richmond Dustin1,Hogains Matthew1,Kastner Ryan1

Affiliation:

1. University of California, San Diego, La Jolla, California

Abstract

We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU’s system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Reference7 articles.

1. R. Brodersen A. Tkachenko and H. Kwok-Hay So. 2006. A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH. In CODES+ISSS’06. R. Brodersen A. Tkachenko and H. Kwok-Hay So. 2006. A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH. In CODES+ISSS’06.

2. SIRC: An Extensible Reconfigurable Computing Communication API

3. J. M III. 2009. Open Component Portability Infrastructure (OPENCPI). J. M III. 2009. Open Component Portability Infrastructure (OPENCPI).

4. RIFFA: A Reusable Integration Framework for FPGA Accelerators

Cited by 74 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Accelerating memory and I/O intensive HPC applications using hardware compression;Journal of Parallel and Distributed Computing;2024-11

2. Strega : An HTTP Server for FPGAs;ACM Transactions on Reconfigurable Technology and Systems;2024-01-27

3. A 100Gbps-ready Low Latency on-Chip Router for FPGA clusters;2024 IEEE International Conference on Consumer Electronics (ICCE);2024-01-06

4. Dynamic and Partial Reconfiguration of FPGAs;Handbook of Computer Architecture;2024

5. DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3