Affiliation:
1. Politecnico di Milano, Milano, Italy
2. Politecnico di Milano, Italy
Abstract
Regular Expression (RE) matching is a computational kernel used in several applications. Since RE complexity and data volumes are steadily increasing, hardware acceleration is gaining attention also for this problem. Existing approaches have limited flexibility as they require a different implementation for each RE. On the other hand, it is complex to map efficient RE representations like non-deterministic finite-state automata onto software-programmable engines or parallel architectures. In this work, we present CICERO , an end-to-end framework composed of a domain-specific architecture and a companion compilation framework for RE matching. Our solution is suitable for many applications, such as genomics/proteomics and natural language processing. CICERO aims at exploiting the intrinsic parallelism of non-deterministic representations of the REs. CICERO can trade-off accelerators’ efficiency and processors’ flexibility thanks to its programmable architecture and the compilation framework. We implemented CICERO prototypes on embedded FPGA achieving up to 28.6× and 20.8× more energy efficiency than embedded and mainstream processors, respectively. Since it is a programmable architecture, it can be implemented as a custom ASIC that is orders of magnitude more energy-efficient than mainstream processors.
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture,Software
Cited by
9 articles.
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1. A Bird's Eye View on Quantum Computing: Current and Future Trends;IEEE EUROCON 2023 - 20th International Conference on Smart Technologies;2023-07-06
2. Exploiting Structure in Regular Expression Queries;Proceedings of the ACM on Management of Data;2023-06-13
3. YARB: a Methodology to Characterize Regular Expression Matching on Heterogeneous Systems;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
4. Enabling Efficient Regular Expression Matching at the Edge through Domain-Specific Architectures;2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2023-05
5. An Energy-Efficient Domain-Specific Architecture for Regular Expressions;IEEE Transactions on Emerging Topics in Computing;2023-01-01