Author:
Brenner Ulrich,Rohe André
Cited by
24 articles.
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1. DRC Violation Prediction After Global Route Through Convolutional Neural Network;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09
2. Pin density technique for congestion estimation and reduction of optimized design during placement and routing;Applied Nanoscience;2022-01-30
3. PROBE: A Placement, Routing, Back-End-of-Line Measurement Utility;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2018-07
4. Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning;Proceedings of the 2017 ACM on International Symposium on Physical Design;2017-03-19
5. Digital Layout: Placement;Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology;2016-04-14