Architecture and Performance of the Hardware Accelerators in IBM’s PowerEN Processor

Author:

Heil Timothy1,Krishna Anil1,Lindberg Nicholas1,Toussi Farnaz1,Vanderwiel Steven1

Affiliation:

1. International Business Machines Corp.

Abstract

Computation at the edge of a datacenter has unique characteristics. It deals with streaming data from multiple sources, going to multiple destinations, often requiring repeated application of one or more of several standard algorithmic kernels. These kernels, related to encryption, compression, XML Parsing and regular expression searching on the data, demand a high data processing rate and power efficiency. This suggests the use of hardware acceleration for key functions. However, robust general purpose processing support is necessary to orchestrate the flow of data between accelerators, as well as perform tasks that are not suited to acceleration. Further, these accelerators must be tightly integrated with the general purpose computation in order to keep invocation overhead and latency low. The accelerators must be easy for software to use, and the system must be flexible enough to support evolving networking standards.In this article, we describe and evaluate the architecture of IBM’s PowerEN processor, with a focus on PowerEN’s architectural enhancements and its on-chip hardware accelerators.PowerEN unites the throughput of application-specific accelerators with the programmability of general purpose cores on a single coherent memory architecture. Hardware acceleration improves throughput by orders of magnitude in some cases compared to equivalent computation on the general purpose cores. By offloading work to the accelerators, general purpose cores are freed to simultaneously work on computation less suited to acceleration.

Publisher

Association for Computing Machinery (ACM)

Subject

Computational Theory and Mathematics,Computer Science Applications,Hardware and Architecture,Modeling and Simulation,Software

Reference34 articles.

1. AHA. 2010. AHA367-PCIe GZIP Compression/Decompression. http://www.aha.com/show_prod.ph?pid=38. AHA. 2010. AHA367-PCIe GZIP Compression/Decompression. http://www.aha.com/show_prod.ph?pid=38.

2. The future of microprocessors

3. Broadcom Inc. 2012. XLP800 Series. http://www.broadcom.com/products/~Processors/Data-Center/XLP800-Series. Broadcom Inc. 2012. XLP800 Series. http://www.broadcom.com/products/~Processors/Data-Center/XLP800-Series.

4. IBM Power Edge of Network Processor: A Wire-Speed System on a Chip

5. Cavium Inc. 2010. Octeon. http://www.cavium.com/OCTEON_MIPS64.html. Cavium Inc. 2010. Octeon. http://www.cavium.com/OCTEON_MIPS64.html.

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