Validation of SoC Firmware-Hardware Flows
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ACM Press
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. ARISTOTLE: Feature Engineering for Scalable Application-Level Post-Silicon Debugging;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. AutoModel: Automatic Synthesis of Models From Communication Traces of SoC Designs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07
3. Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs;IEEE Design & Test;2024-06
4. Method to Generate Bus Stress Pattern Using iBUS(Infineon Bus Under Stress) framework;2023 12th Mediterranean Conference on Embedded Computing (MECO);2023-06-06
5. Formal Verification of Security Critical Hardware-Firmware Interactions in Commercial SoCs;Proceedings of the 56th Annual Design Automation Conference 2019;2019-06-02
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