Performance Evaluation of NoC-Based Multicore Systems
Author:
Affiliation:
1. Shanghai Jiao Tong University, Shanghai, China
2. University of Southern California, Los Angeles, CA
3. The Hong Kong University of Science and Technology, Clear Water Bay, Hong Kong
4. Carnegie Mellon University, Pittsburgh, PA
Abstract
Funder
US National Science Foundation
Hong Kong Research Grants Council
Publisher
Association for Computing Machinery (ACM)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications
Link
https://dl.acm.org/doi/pdf/10.1145/2870633
Reference142 articles.
1. C. Ababei P. P. Pande and S. Pasricha. 2012. Network-on-chips (NoC) Blog. Retrieved from http://networkonchip.wordpress.com/. C. Ababei P. P. Pande and S. Pasricha. 2012. Network-on-chips (NoC) Blog. Retrieved from http://networkonchip.wordpress.com/.
2. TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers
3. ESESC: A fast multicore simulator using Time-Based Sampling
4. A comprehensive power-performance model for NoCs with multi-flit channel buffers
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