T unne L s for B ootlegging: Fully Reverse-Engineering GPU TLBs for Challenging Isolation Guarantees of NVIDIA MIG-Reference-Cited by-同舟云学术

T unne L s for B ootlegging: Fully Reverse-Engineering GPU TLBs for Challenging Isolation Guarantees of NVIDIA MIG

Published:2023-11-15 Issue: Volume: Page:
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Container-title:Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security
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Author:

Zhang Zhenkai¹^ORCID,Allen Tyler²^ORCID,Yao Fan³^ORCID,Gao Xing⁴^ORCID,Ge Rong¹^ORCID

Affiliation:

1. Clemson University, Clemson, SC, USA

2. University of North Carolina at Charlotte, Charlotte, NC, USA

3. University of Central Florida, Orlando, FL, USA

4. University of Delaware, Newark, DE, USA

Funder

NSF (National Science Foundation)

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3576915.3616672

Reference58 articles.

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2. Andreas Abel and Jan Reineke. 2013. Measurement-Based Modeling of the Cache Replacement Policy. In RTAS.

3. Jaeguk Ahn Jiho Kim Hans Kasan Leila Delshadtehrani Wonjun Song Ajay Joshi and John Kim. 2021. Network-on-Chip Microarchitecture-Based Covert Channel in GPUs. In MICRO.

4. cnvrg.io. [n. d.]. Multi-Instance GPU Support for ML Workloads with cnvrg.io on NVIDIA A100. https://cnvrg.io/solutions/multi-instance-gpu/.

5. Bang Di, Daokun Hu, Zhen Xie, Jianhua Sun, Hao Chen, Jinkui Ren, and Dong Li. 2021. TLB-Pilot: Mitigating TLB Contention Attack on GPUs with Microarchitecture-Aware Scheduling. ACM TACO (2021).

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