Offloading cache configuration prediction to an FPGA for hardware speedup and overhead reduction-Reference-Cited by-同舟云学术

Offloading cache configuration prediction to an FPGA for hardware speedup and overhead reduction

Published:2019-10-13 Issue: Volume: Page:
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Container-title:Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion
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Author:

Vazquez Ruben¹,Gordon-Ross Ann¹,Stitt Greg¹

Affiliation:

1. University of Florida

Funder

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3349567.3351730

Reference10 articles.

1. M. Abadi P. Barham J. Chen Z. Chen A. Davis J. Dean M. Devin S. Ghemawat G. Irving M. Isard M. Kudlur J. Levenberg R. Monga S. Moore D. G. Murray B. Steiner P. Tucker V. Vasudevan P. Warden M. Wicke Y. Yu and X. Zheng "TensorFlow: A system for large-scale machine learning " in 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16) 2016 M. Abadi P. Barham J. Chen Z. Chen A. Davis J. Dean M. Devin S. Ghemawat G. Irving M. Isard M. Kudlur J. Levenberg R. Monga S. Moore D. G. Murray B. Steiner P. Tucker V. Vasudevan P. Warden M. Wicke Y. Yu and X. Zheng "TensorFlow: A system for large-scale machine learning " in 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16) 2016

2. arXiv:1807.05317 [cs.LG]. arXiv:1807.05317 [cs.LG].

3. EEMBC. The Embedded Microprocessor Benchmark Consortium http://www.eembc.org/benchmark/automotive_sl.php Sept. 2013 EEMBC. The Embedded Microprocessor Benchmark Consortium http://www.eembc.org/benchmark/automotive_sl.php Sept. 2013

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