Mapping hard real-time applications on many-core processors

Author:

Perret Quentin1,Maurère Pascal1,Noulard Éric2,Pagetti Claire2,Sainrat Pascal3,Triquet Benoît1

Affiliation:

1. Airbus Operations S.A.S., Toulouse, France

2. DTIM, UFT-MiP, ONERA, Toulouse, France

3. IRIT, UFT-MiP, UPS, Toulouse, France

Publisher

ACM Press

Reference26 articles.

Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Task and Memory Mapping of Large Size Embedded Applications over NUMA architecture✱;The 31st International Conference on Real-Time Networks and Systems;2023-06-07

2. Federated Scheduling in Clustered Many-core Processors;2021 IEEE/ACM 25th International Symposium on Distributed Simulation and Real Time Applications (DS-RT);2021-09-27

3. Optimizing Inter-Core Data-Propagation Delays in Industrial Embedded Systems under Partitioned Scheduling;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18

4. Contention-Free Scheduling for Clustered Many-Core Platform;2020 IEEE International Conference on Embedded Software and Systems (ICESS);2020-12-10

5. Bounding the delays of the MPPA network-on-chip with network calculus: Models and benchmarks;Performance Evaluation;2020-11

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