A new memory reliability technique for multiple bit upsets mitigation-Reference-Cited by-同舟云学术

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A new memory reliability technique for multiple bit upsets mitigation

Published:2019-04-30 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 16th ACM International Conference on Computing Frontiers
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Author:

Chabot Alexandre¹,Alouani Ihsen²,Niar Smail²,Nouacer Reda¹

Affiliation:

1. Software Reliability and Security Laboratory, Gif-sur-Yvette, France

2. Polytechnic University Hauts-De-France, Valenciennes, France

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3310273.3321564

Reference15 articles.

1. Accellera. 2011. SystemC Standard Download page. (2011). http://www.accellera.org/downloads/standards/systemc Accellera. 2011. SystemC Standard Download page. (2011). http://www.accellera.org/downloads/standards/systemc

2. John Aynsley. 2009. OSCI TLM-2.0 language reference manual (ja32 ed.). Open SystemC Initiative. John Aynsley. 2009. OSCI TLM-2.0 language reference manual (ja32 ed.). Open SystemC Initiative.

3. CEA. 2011--2016. UNISIM Virtual Platforms http://unisim-vp.org. (2011--2016). CEA. 2011--2016. UNISIM Virtual Platforms http://unisim-vp.org. (2011--2016).

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fault Tolerance Method for Memory Based on Inner Product Similarity and Experimental Study on Heavy Ion Irradiation;Journal of Circuits, Systems and Computers;2022-08-06

2. Mitigating multi-cell upsets impacts on approximate network on chip through unequal message protection;IEICE Electronics Express;2020

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