ffLink

Abstract

We describe the architecture and implementation of ffLink, a high-performance PCIe Gen3 interface for attaching reconfigurable accelerators on Xilinx Virtex 7 FPGA devices to Linux-based hosts. ffLink encompasses both hardware as well as flexible operating system components that allow a tailoring of the infrastructure to the specific data transfer needs of the application. When configured to use multiple DMA engines to hide transfer latencies, ffLink achieves a throughput of up to 7 GB/s, which is 95% of the maximum throughput of an eight-lane PCIe interface, while requiring just 11% of device area on a mid-size FPGA.