Real-world design and evaluation of compiler-managed GPU redundant multithreading

Author:

Wadden Jack1,Lyashevsky Alexander2,Gurumurthi Sudhanva3,Sridharan Vilas4,Skadron Kevin1

Affiliation:

1. University of Virginia, Charlottesville, Virginia, USA

2. AMD Research, Advanced Micro Devices, Inc., Sunnyvale, CA, USA

3. AMD Research, Advanced Micro Devices, Inc., Boxborough, MA, USA

4. RAS Architecture, Advanced Micro Devices, Inc., Boxborough, MA, USA

Abstract

Reliability for general purpose processing on the GPU (GPGPU) is becoming a weak link in the construction of reliable supercomputer systems. Because hardware protection is expensive to develop, requires dedicated on-chip resources, and is not portable across different architectures, the efficiency of software solutions such as redundant multithreading (RMT) must be explored. This paper presents a real-world design and evaluation of automatic software RMT on GPU hardware. We first describe a compiler pass that automatically converts GPGPU kernels into redundantly threaded versions. We then perform detailed power and performance evaluations of three RMT algorithms, each of which provides fault coverage to a set of structures in the GPU. Using real hardware, we show that compilermanaged software RMT has highly variable costs. We further analyze the individual costs of redundant work scheduling, redundant computation, and inter-thread communication, showing that no single component in general is responsible for high overheads across all applications; instead, certain workload properties tend to cause RMT to perform well or poorly. Finally, we demonstrate the benefit of architectural support for RMT with a specific example of fast, register-level thread communication

Publisher

Association for Computing Machinery (ACM)

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