SpecBCFuzz: Fuzzing LTL Solvers with Boundary Conditions
Author:
Affiliation:
1. SnT, University of Luxembourg, Luxembourg, Luxembourg
2. University of Rio Cuarto, Rio Cuarto, Argentina
3. University of Luxembourg, Luxembourg, Luxembourg
Funder
Luxembourg National Research Funds (FNR)
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3597503.3639087
Reference80 articles.
1. Rajeev Alur, Salar Moarref, and Ufuk Topcu. Counter-strategy guided refinement of GR(1) temporal logic specifications. In Formal Methods in Computer-Aided Design, FMCAD 2013, Portland, OR, USA, October 20--23, 2013, pages 26--33, 2013.
2. A practical guide for using statistical tests to assess randomized algorithms in software engineering
3. cvc5: A Versatile and Industrial-Strength SMT Solver
4. CoVeriTest: Cooperative Verifier-Based Testing
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