Binary Adder Circuits of Asymptotically Minimum Depth, Linear Size, and Fan-Out Two

Author:

Held Stephan1,Spirkl Sophie Theresa1ORCID

Affiliation:

1. Research Institute for Discrete Mathematics, University of Bonn, Germany

Abstract

We consider the problem of constructing fast and small binary adder circuits. Among widely used adders, the Kogge-Stone adder is often considered the fastest, because it computes the carry bits for two n -bit numbers (where n is a power of two) with a depth of 2 log 2 n logic gates, size 4 n log 2 n , and all fan-outs bounded by two. Fan-outs of more than two are disadvantageous in practice, because they lead to the insertion of repeaters for repowering the signal and additional depth in the physical implementation. However, the depth bound of the Kogge-Stone adder is off by a factor of two from the lower bound of log 2 n . Two separate constructions by Brent and Krapchenko achieve this lower bound asymptotically. Brent’s construction gives neither a bound on the fan-out nor the size, while Krapchenko’s adder has linear size, but can have up to linear fan-out. With a fan-out bound of two, neither construction achieves a depth of less than 2 log 2 n . In a further approach, Brent and Kung proposed an adder with linear size and fan-out two but twice the depth of the Kogge-Stone adder. These results are 33–43 years old and no substantial theoretical improvement for has been made since then. In this article, we integrate the individual advantages of all previous adder circuits into a new family of full adders, the first to improve on the depth bound of 2 log 2 n while maintaining a fan-out bound of two. Our adders achieve an asymptotically optimum logic gate depth of log 2 n + o (log 2 n ) and linear size O ( n ).

Publisher

Association for Computing Machinery (ACM)

Subject

Mathematics (miscellaneous)

Reference22 articles.

1. On the Addition of Binary Numbers

2. A Regular Layout for Parallel Adders

3. Reducing Structural Bias in Technology Mapping

4. New bounds for parallel prefix circuits

5. S. B. Gashkov M. I. Grinchuk and I. S. Sergeev. 2008. On the construction of schemes for adders of small depth. Diskr. Anal. Issledov. Operat. Ser. 1 14 1 (2007) 27--44 (in Russian). {English translation in J. Appl. Industr. Math. 2 2 (2008 167--178). S. B. Gashkov M. I. Grinchuk and I. S. Sergeev. 2008. On the construction of schemes for adders of small depth. Diskr. Anal. Issledov. Operat. Ser. 1 14 1 (2007) 27--44 (in Russian). {English translation in J. Appl. Industr. Math. 2 2 (2008 167--178).

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Constructing depth-optimum circuits for adders and And-Or paths;Discrete Applied Mathematics;2022-03

2. ON THE MEANING OF WORKS BY V. M. KHRAPCHENKO;Prikladnaya Diskretnaya Matematika;2020-06

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3