Using compiler snippets to exploit parallelism on heterogeneous hardware: a Java reduction case study

Author:

Fumero Juan1,Kotselidis Christos2

Affiliation:

1. University of Manchester, UK

2. The University of Manchester, UK

Publisher

ACM

Reference33 articles.

1. NVIDIA Tesla P100 The Most Advanced Datacenter Accelerator Ever Built 2016. https://images.nvidia.com/content/pdf/tesla/whitepaper/ pascal-architecture-whitepaper.pdf . NVIDIA Tesla P100 The Most Advanced Datacenter Accelerator Ever Built 2016. https://images.nvidia.com/content/pdf/tesla/whitepaper/ pascal-architecture-whitepaper.pdf .

2. AMD. Aparapi 2016. http://aparapi.github.io/ . AMD. Aparapi 2016. http://aparapi.github.io/ .

3. Towards co-designed optimizations in parallel frameworks

4. Carbone and Asterios Katsifodimos and Stephan Ewen and Volker Markl and Seif Haridi and Kostas Tzoumas. Apache Flink T M : Stream and Batch Processing in a Single Engine Paris. 2016. Carbone and Asterios Katsifodimos and Stephan Ewen and Volker Markl and Seif Haridi and Kostas Tzoumas. Apache Flink T M : Stream and Batch Processing in a Single Engine Paris. 2016.

5. Copperhead

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Automatically exploiting the memory hierarchy of GPUs through just-in-time compilation;Proceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments;2021-04-07

2. Python programmers have GPUs too: automatic Python loop parallelization with staged dependence analysis;Proceedings of the 15th ACM SIGPLAN International Symposium on Dynamic Languages;2019-10-20

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