PLD: fast FPGA compilation to make reconfigurable acceleration compatible with modern incremental refinement software development

Author:

Xiao Yuanlong1ORCID,Micallef Eric1,Butt Andrew1ORCID,Hofmann Matthew1,Alston Marc1,Goldsmith Matthew1,Merczynski-Hait Andrew1,DeHon André1ORCID

Affiliation:

1. University of Pennsylvania, USA

Funder

Google Faculty Research Award

Office of Naval Research

Publisher

ACM

Reference74 articles.

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2. Kent Beck and Cynthia Andres . 2004. Extreme Programming Explained . Addison-Wesley . Kent Beck and Cynthia Andres. 2004. Extreme Programming Explained. Addison-Wesley.

3. ZUMA: An Open FPGA Overlay Architecture

4. The swappable logic unit: a paradigm for virtual hardware

5. Finding hard-to-find data plane bugs with a PTA

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