Software-defined address mapping: a case on 3D memory

Author:

Zhang Jialiang1,Swift Michael2,Li Jing (Jane)1

Affiliation:

1. University of Pennsylvania, USA

2. University of Wisconsin-Madison, USA

Publisher

ACM

Reference49 articles.

1. Data reorganization in memory using 3D-stacked DRAM

2. JEDEC Solid State Technology Association et al. 2012. JEDEC Standard: DDR4 SDRAM. JESD79-4 Sep ( 2012 ). JEDEC Solid State Technology Association et al. 2012. JEDEC Standard: DDR4 SDRAM. JESD79-4 Sep ( 2012 ).

3. Classifying Memory Access Patterns for Prefetching

4. Main-memory hash joins on multi-core CPUs: Tuning to the underlying hardware

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1. NeuroTAP: Thermal and Memory Access Pattern-Aware Data Mapping on 3D DRAM for Maximizing DNN Performance;ACM Transactions on Embedded Computing Systems;2024-09-11

2. UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

3. (MC)2: Lazy MemCopy at the Memory Controller;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

4. täkō;Proceedings of the 49th Annual International Symposium on Computer Architecture;2022-06-11

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