Adaptive front-end throttling for superscalar processors
Author:
Affiliation:
1. University of Virginia, Charlottesville, VA, USA
Funder
Division of Emerging Frontiers
Division of Information and Intelligent Systems
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2627369.2627633
Reference19 articles.
1. HP labs. CACTI. http://www.hpl.hp.com/research/cacti/. HP labs. CACTI. http://www.hpl.hp.com/research/cacti/.
2. Power and energy reduction via pipeline balancing
3. Instruction flow-based front-end throttling for power-aware high-performance processors
4. Wattch
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