Breaking master-slave model between host and FPGAs

Author:

Bosch Jaume1,Vidal Miquel2,Filgueras Antonio2,Álvarez Carlos1,Jiménez-González Daniel1,Martorell Xavier1,Ayguadé Eduard1

Affiliation:

1. Universitat Politècnica de Catalunya

2. Barcelona Supercomputing Center

Funder

Departament d'Innovació, Universitats i Empresa, Generalitat de Catalunya

Ministerio de Economía y Competitividad

Horizon 2020 Framework Programme

Publisher

ACM

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. High Performance Computing PP-Distance Algorithms to Generate X-ray Spectra from 3D Models;International Journal of Molecular Sciences;2022-09-27

3. Assessment of OpenMP Master–Slave Implementations for Selected Irregular Parallel Applications;Electronics;2021-05-16

4. OmpSs@FPGA framework for high performance FPGA computing;IEEE Transactions on Computers;2021

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