Process Barrier for Predictable and Repeatable Concurrent Execution

Author:

Nishi Masataka1

Affiliation:

1. Center for Technology Innovation R&D Group, Hitachi Ltd., Japan

Publisher

ACM Press

Reference35 articles.

1. Abdullah Al-Nayeem, Mu Sun, Xiaokang Qiu, Lui Sha, Steven P Miller, and Darren D Cofer. 2009. A formal architecture pattern for real-time distributed systems. In Real-Time Systems Symposium, 2009, RTSS 2009. 30th IEEE. IEEE, 161--170.

2. S. Baruah, H. Li, and L. Stougie. 2010. Towards the design of certifiable mixed-criticality systems. In Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS). IEEE, 13--22.

3. Micah J Best, Shane Mottishaw, Craig Mustard, Mark Roth, Alexandra Fedorova, and Andrew Brownsword. 2011. Synchronization via scheduling: techniques for efficiently managing shared state. In ACM SIGPLAN Notices, Vol. 46. ACM, 640--652.

4. Filip Blagojevic, Dimitris S Nikolopoulos, Alexandros Stamatakis, and Christos D Antonopoulos. 2007. Dynamic multigrain parallelization on the cell broadband engine. In Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming. ACM, 90--100.

5. George Bosilca, Aurelien Bouteiller, Anthony Danalis, Mathieu Faverge, Thomas Hérault, and Jack J Dongarra. 2013. Parsec: Exploiting heterogeneity to enhance scalability. Computing in Science & Engineering 15, 6 (2013), 36--45.

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