Routability-Driven FPGA Placement Contest-Reference-Cited by-同舟云学术

Routability-Driven FPGA Placement Contest

Published:2016-04-03 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2016 on International Symposium on Physical Design
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Author:

Yang Stephen¹,Gayasen Aman¹,Mulpuri Chandra¹,Reddy Sainath¹,Aggarwal Rajat¹

Affiliation:

1. Xilinx Inc., San Jose, CA, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2872334.2886419

Reference6 articles.

1. FPGA place & route challenges

2. Xilinx "UltraScale Architecture" http://www.xilinx.com/products/technology/ultrascale.html Xilinx "UltraScale Architecture" http://www.xilinx.com/products/technology/ultrascale.html

3. Xilinx "Virtex UltraScale FPGAs" http://www.xilinx.com/publications/prod_mktg/ultrascalevirtex-product-table Xilinx "Virtex UltraScale FPGAs" http://www.xilinx.com/publications/prod_mktg/ultrascalevirtex-product-table

4. Xilinx "UltraScale Architecture Configurable Logic Block User Guide" http://www.xilinx.com/support/documentation/user_guides/ug574-ultrascale-clb.pdf Xilinx "UltraScale Architecture Configurable Logic Block User Guide" http://www.xilinx.com/support/documentation/user_guides/ug574-ultrascale-clb.pdf

5. Xilinx "UltraScale Architecture and Product Overview" http://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdf Xilinx "UltraScale Architecture and Product Overview" http://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdf

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