FlutPIM:

Author:

Sutradhar Purab Ranjan1ORCID,Bavikadi Sathwika1ORCID,Indovina Mark1ORCID,Pudukotai Dinakarrao Sai Manoj1ORCID,Ganguly Amlan1ORCID

Affiliation:

1. Rochester Institute of Technology, Rochester, NY, USA

Funder

US National Science Foundation

Publisher

ACM

Reference18 articles.

1. 2021. High Bandwidth Memory (HBM)DRAM. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION ( 2021 ). 2021. High Bandwidth Memory (HBM)DRAM. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (2021).

2. A. Nowatzyk 1996 . Missing the Memory Wall: The Case for Processor/Memory Integration. In 23rd Annual International Symposium on Computer Architecture (ISCA'96) . 90--90. https://doi.org/10.1109/ISCA.1996.10008 10.1109/ISCA.1996.10008 A. Nowatzyk et al. 1996. Missing the Memory Wall: The Case for Processor/Memory Integration. In 23rd Annual International Symposium on Computer Architecture (ISCA'96). 90--90. https://doi.org/10.1109/ISCA.1996.10008

3. Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration

4. C. Sudarshan 2022 . A Critical Assessment ofnbsp;DRAM-PIM Architec- tures - Trends, Challenges andnbsp; Solutions. In Embedded Computer Systems: Architectures, Modeling, and Simulation: 22nd International Conference , SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings ( Samos, Greece). 362--379. C. Sudarshan et al. 2022. A Critical Assessment ofnbsp;DRAM-PIM Architec- tures - Trends, Challenges andnbsp; Solutions. In Embedded Computer Systems: Architectures, Modeling, and Simulation: 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings (Samos, Greece). 362--379.

5. Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ReApprox-PIM: Reconfigurable Approximate Lookup-Table (LUT)-Based Processing-in-Memory (PIM) Machine Learning Accelerator;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-08

2. Reconfigurable Processing-in-Memory Architecture for Data Intensive Applications;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

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