Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking

Author:

Rahman Mohammad Sazadur1ORCID,Zamiri Azar Kimia1ORCID,Farahmandi Farimah1ORCID,Mardani Kamali Hadi1ORCID

Affiliation:

1. University of Florida, Gainesville, FL, USA

Publisher

ACM

Reference35 articles.

1. A. Jain etal 2020. Atpg-guided fault injection attacks on logic locking. In 2020 IEEE Physical Assurance and Inspection of Electronics (PAINE). IEEE 1--6. A. Jain et al. 2020. Atpg-guided fault injection attacks on logic locking. In 2020 IEEE Physical Assurance and Inspection of Electronics (PAINE). IEEE 1--6.

2. TAAL

3. C. McDonald etal 2008. An algebraic analysis of Trivium ciphers based on the boolean satisfiability problem. In Int'l Workshop on Boolean Functions. 173--184. C. McDonald et al. 2008. An algebraic analysis of Trivium ciphers based on the boolean satisfiability problem. In Int'l Workshop on Boolean Functions. 173--184.

4. E. Nudelman etal 2004. Understanding Random SAT: Beyond the Clauses-to-Variables Ratio. In Int'l Conf. on PPCP. 438--452. E. Nudelman et al. 2004. Understanding Random SAT: Beyond the Clauses-to-Variables Ratio. In Int'l Conf. on PPCP. 438--452.

5. H. M. Kamali 2018 . Lut-lock: A novel lut-based logic obfuscation for fpga-bitstream and asic-hardware protection . In IEEE Symposium on VLSI (ISVLSI). IEEE, 405--410 . H. M. Kamali et al. 2018. Lut-lock: A novel lut-based logic obfuscation for fpga-bitstream and asic-hardware protection. In IEEE Symposium on VLSI (ISVLSI). IEEE, 405--410.

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1. SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

2. Advances in Logic Locking;Hardware Security;2024

3. Quantifiable Assurance in Hardware;Hardware Security;2024

4. Fundamentals of Logic Locking;Understanding Logic Locking;2023-06-26

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