RTL-Repair: Fast Symbolic Repair of Hardware Design Code-Reference-Cited by-同舟云学术

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RTL-Repair: Fast Symbolic Repair of Hardware Design Code

Published:2024-04-27 Issue: Volume:2 Page:867-881
ISSN:
Container-title:Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3
language:
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Author:

Laeufer Kevin¹^ORCID,Fajardo Brandon¹^ORCID,Ahuja Abhik²^ORCID,Iyer Vighnesh²^ORCID,Nikolić Borivoje²^ORCID,Sen Koushik²^ORCID

Affiliation:

1. University of California, Berkeley, Berkeley, United States of America

2. University of California, Berkeley, Berkeley, USA

Funder

National Science Foundation

Publisher

ACM

Reference50 articles.

1. IEC/IEEE International Standard - Verilog(R) Register Transfer Level Synthesis. IEEE/IEC 62142 2005.

2. IEEE Standard for SystemVerilog --- Unified Hardware Design, Specification, and Verification Language. IEEE Std. 1800, 2017.

3. IEEE Standard for VHDL Language Reference Manual. IEEE Std. 1076, 2019.

4. IEEE Standard for Universal Verification Methodology Language Reference Manual. IEEE Std. 1800.2 2020.

5. Baleegh Ahmad, Shailja Thakur, Benjamin Tan, Ramesh Karri, and Hammond Pearce. Fixing Hardware Security Bugs with Large Language Models. arXiv preprint arXiv:2302.01215, 2023.

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