Reduction of Power Consumption in FPGAs - An Overview-Reference-Cited by-同舟云学术

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Reduction of Power Consumption in FPGAs - An Overview

Published:2012-10-23 Issue:5 Volume:4 Page:50-69
ISSN:2074-9023
Container-title:International Journal of Information Engineering and Electronic Business
language:
Short-container-title:IJIEEB

Author:

Grover Naresh,K.Soni M.

Publisher

MECS Publisher

Link

http://www.mecs-press.org/ijieeb/ijieeb-v4-n5/IJIEEB-V4-N5-7.pdf

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparison of power consumption in pipelined implementations of the BLAKE3 cipher in FPGA devices;International Journal of Electronics and Telecommunications;2024-03-23

2. Dedicated FPGA Resources in Improving Power Efficiency of Implementations of BLAKE3 Hash Function;Lecture Notes in Networks and Systems;2024

3. Analysis of FPGA theory and its development potential;Journal of Physics: Conference Series;2023-11-01

4. Power Analysis of BLAKE3 Pipelined Implementations in FPGA Devices;Lecture Notes in Networks and Systems;2023

5. High-Level Synthesis Hardware Design for FPGA-Based Accelerators: Models, Methodologies, and Frameworks;IEEE Access;2022

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