Veritabanı Uygulamalarında FPGA Tabanlı Hızlandırıcı Kullanımı

Author:

ÖZTÜRK Erdinç

Publisher

European Journal of Science and Technology

Reference12 articles.

1. Alpern, B., Carter, L., Feig, E., & Selker, T. (1994). The uniform memory hierarchy model of computation. Algorithmica, 72.

2. Eigenmann, R., & Lilja, D. J. (1998). Von neumann computers. Wiley Encyclopedia of Electrical and Electronics Engineering, 23, 387-400.

3. Hammarlund, P., Martinez, A. J., Bajwa, A. A., Hill, D. L., Hallnor, E., Jiang, H., . . . Osborne, R. (2014). Hammarlund, Per, et al. "Haswell: The fourth-generation intel core processor. IEEE Micro, 6-20.

4. Hennessy, J. L., & Patterson, D. A. (2011). Computer architecture: a quantitative approach. Elsevier.

5. Jacobsen, M., Richmond, D., Hogains, M., & Kastner, R. (2015). RIFFA 2.1: A reusable integration framework for FPGA accelerators. ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8, 1-23.

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