Filtering of Complex Signals Based on a Two-Level Fuzzy-Logic Model

Abstract

Purpose of research. Development of a method and algorithm of complex analog radio signals filtering and binarization, such as the signal of Automatic dependent surveillance-broadcast (ADS-B), which allows to increase the sensitivity of the receiver of the AZN-B signal and increase the number of correctly detected received messages.Methods. To solve this problem, the basics of the theory of signal filtering and the theory of fuzzy sets were applied in the work. The proposed method is based on combining signal filtering by known filters and a two-level fuzzy model. The first and second levels of the fuzzy model contain three operations: automatic formation of membership functions, compositional output and defuzzification. Input variables of both levels are given by trapezoidal membership functions. At the first level, they are formed automatically depending on the characteristics of the complex signal. The output function at the first level is given by a singleton function, and defuzzification is carried out using a simplified center of gravity model.Results. The proposed algorithm was implemented in the developed device based on a programmable logic integrated circuit (FPGA). In addition to filtering, the developed device implements all signal processing functions, such as: receiving input data, decoding, checking the correctness of decoded data, storing them, transmitting ADS-B messages for further processing. A distinctive feature of the device is its small size and low power consumption, which allows use it in small spacecraft and unmanned aerial vehicles.Conclusion. A method of filtering complex signals based on a fuzzy logic model is considered, which can be used to filter complex signals, such as ADS-B messages in small spacecraft modules. The proposed implementation of the filtering method makes it possible to increase the sensitivity of the AZN-B signal receiver by 20% and correctly decode the received signal. The method was implemented by an FPGA-based device, which made it possible to reduce the size and power consumption compared to analogues.