Dual Edge-Triggered D-Type Flip-Flop with Low Power Consumption-Reference-Cited by-同舟云学术

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Dual Edge-Triggered D-Type Flip-Flop with Low Power Consumption

Published:2018-10-30 Issue:5 Volume:10 Page:01-12
ISSN:0975-4660
Container-title:International Journal of Computer Science and Information Technology
language:
Short-container-title:IJCSIT

Author:

Yu Chien-Cheng,Tsai Ching-Chith

Publisher

Academy and Industry Research Collaboration Center (AIRCC)

Subject

General Medicine

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Review of Dual-Edge Triggered Low-Power D Flip-Flops;2023 3rd International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON);2023-12-29

2. A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11

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