Recent technology trend in Power Semiconductor Devices
Author:
Affiliation:
1. Mitsubishi Electric Corporation
2. Hitachi Research Laboratory, Hitachi Ltd.
3. National Institute of AIST. Energy Semiconductor Electronics Research Laboratory
Publisher
Institute of Electrical Engineers of Japan (IEE Japan)
Subject
Electrical and Electronic Engineering
Link
http://www.jstage.jst.go.jp/article/ieejeiss/130/6/130_6_912/_pdf
Reference20 articles.
1. (1) Y. Miura et al. : “High Performance Superjunction UMOSFETs with Split P-Columns Fabricated by Multi-Ion-Implantations”, Proc. ISPSD, pp. 39-42 (2005)
2. (2) M. A. Gajda et al. : “Industrialisation of Resurf Stepped Oxide Technology for Power Transistors”, Proc. ISPSD, pp. 109-112 (2006)
3. (3) S. Ono et al. : “Design concept of n-buffer layer (n-Bottom Assist Layer) for 600V-class Semi-Super Junction MOSFET”, Proc. ISPSD, pp. 25-28 (2007)
4. (4) Q. Wang et al. : “Power trench MOSFET devices on metal substrates”, IEEE Electron Device Lett., Vol. 29, No. 9, pp. 1040-1042 (2008-9)
5. (5) T. Hashimoto et al. : “System in Package with Mounted Capacitor for Reduced Parasitic Inductance in Voltage Regulators”, Proc. of the 20th ISPSD, pp. 315-318 (2008)
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