Linearlization of Stochastic Flash A-to-D Converter-Reference-Cited by-同舟云学术

Linearlization of Stochastic Flash A-to-D Converter

Published:2016 Issue:1 Volume:136 Page:8-15
ISSN:0385-4221
Container-title:IEEJ Transactions on Electronics, Information and Systems
language:en
Short-container-title:IEEJ Trans.EIS

Author:

Sugimoto Toshiki¹,Tanimoto Hiroshi¹,Yoshizawa Shingo¹

Affiliation:

1. Dept. of Electrical and Electronic Engineering, Kitami Institute of Technology

Publisher

Institute of Electrical Engineers of Japan (IEE Japan)

Subject

Electrical and Electronic Engineering

Link

https://www.jstage.jst.go.jp/article/ieejeiss/136/1/136_8/_pdf

Reference12 articles.

1. (3) S. Weaver, B. Hershberg, D. Knierim, and U.-K. Moon: “A 6b Stochastic Flash Analog-to-Digital Converter Without Calibration or Reference Ladder”, IEEE A. S. S. C. C., 13-4 (2008)

2. (4) H. Ham, T. Matsuoka, J. Wang, K. Taniguchi: “Design of a High-Speed-Sampling Stochastic Flash Analog-to-Digital Converter Using Device Mismatch”, IEEJ, Vol. 131-C, No. 11, pp. 1848-1857 (2011)

3. (6) S. Weaver, B. Hershberg, and U.-K. Moon: “Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells”, 2011 Symposium on VLSI Circuits Digest of Technical Papers, 25-3, pp. 266-267 (2011)

4. (8) M. Ceekala, K. El-Sankary, E. El-Masry: “Stochastic ADC with random U-quadratic distributed reference voltage to uniformly distribute comparators trip point”, Analog Integr. Circ. Sig. Process., Vol. 74, No. 2, pp. 461-465 (2013) DOI 10.1007/s10470-012-9996-3

5. (9) S. Weaver, B. Hershberg, and U.-K. Moon: “Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells”, IEEE Trans. on Circuits and Syst. —I: Regular Paers, Vol. 61, No. 1, pp. 84-91 (2014) DOI: 10.1109/TCSI. 2013.2268571

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