Monolithically integrated self-aligned SiN edge coupler with <0.6/0.8 dB TE/TM insertion loss, <-39 dB back reflection and >520 mW high-power handling capability-Reference-Cited by-同舟云学术

Monolithically integrated self-aligned SiN edge coupler with <0.6/0.8 dB TE/TM insertion loss, <-39 dB back reflection and >520 mW high-power handling capability

Published:2023 Issue: Volume: Page:
ISSN:
Container-title:Optical Fiber Communication Conference (OFC) 2023
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Author:

Bian Yusheng,Hirokawa Takako,Karra Vaishnavi,Dasgupta Arpan,Lee Won Suk,Aboketaf Abdelsalam,Afzal Francis,Sporer Ryan,Nummy Karen,Giewont Ken,Harris Nickolas C.,Baghdadi Reza,Gupta Shashank,Donegan Keith,Houghton Thomas,Popielarski Brian,Dezfulian Kevin K.,Todorov Petar Ivanov,Peng Bo,Chandran Sujith,Gheith Mohamed,Stobert Ian,Ghosal Mini Modh,Cho Jae Kyu,Vakil Apoorva,Kim Sunoo,Wu Zhuo-jie (George),Stricker Andy,McLean Kate,Fasano Benjamin V,Rakowski Michal,Liu Qidi,Rauer Matt,Gallagher Ryan,Sirdeshmukh Ranjani,Robson Norm,Melville Ian,Augur Rod,Lee Jae Gon,Lin Wenhe,Gifford George,Fox Robert,Gupta Vikas,Yu Anthony,Pellerin John,Letavic Ted

Abstract

We experimentally demonstrated V-groove-based self-aligned SiN edge coupler (EC) on a monolithic CMOS-SiPh platform. <0.6/0.8 dB TE/TM SMF-EC transmission efficiency, in conjunction with <-39 dB back reflection and >520 mW power handling capability were achieved.

Publisher

Optica Publishing Group

Reference10 articles.

1. Device Requirements for Optical Interconnects to Silicon Chips

2. A Monolithically Integrated Large-Scale Optical Phased Array in Silicon-on-Insulator CMOS

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