Author:
Uemura Hirotaka,Motoji Reona,Matsui Naoki,Maeda Dan,Sugita Tomoya
Abstract
We propose a spot-size converter design manufacturable with 0.18 μm CMOS design rules. This structure, composed of two-step silicon nitride tapers and intermediate cores, reduces polarization loss by more than half that of conventional structures.
Cited by
1 articles.
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