Cache Coherence in Multiprocessors: A Survey

Author:

Yousif Mazin S.,Thazhuthaveetil M.J.,Das C.R.

Publisher

Elsevier

Reference80 articles.

1. S.V. Adve M.D. Hill, (1990). Weak Ordering–a New Definition. In: Proc. 17th Annual Int'l Symposium on Computer Architecture, 2-14.

2. A. Agarwal, R. Simoni, and J.L. Hennessy, M. Horowitz, (1988). An Evaluation of Directory Schemes for Cache Coherence. In: Proc. 15th Annual Int'l Symposium on Computer Architecture, 280-289.

3. A. Agarwal, Lim, B. -H., D. Kranz, J. Kubiatowics (1990). APRIL: A Processor Architecture for Multiprocessing. In: Proc. 17th Annual Int'l Symposium on Computer Architecture, pp. 104-114

4. M.S. Algudady, C.R. Das, and M.J. Thazhuthaveetil, (1990a). A Write-Invalidate Cache Coherence Protocol for MIN-Based Multiprocessors. In: Proc. ISMM Int'l Conference on Parallel and Distributed Computing, and Systems,pp.77-81.

5. M.S. Algudady, C.R. Das, M.J. Thazhuthaveetil, (1990b). A Write-Update Cache Coherence Protocol for MIN-Based Multiprocessors with Accessibility-Based Split Caches. In: Proc. Supercomputing 90, pp.544-553.

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