Partitioning of processor arrays: a piecewise regular approach-Reference-Cited by-同舟云学术

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Partitioning of processor arrays: a piecewise regular approach

Published:1993-02 Issue:3 Volume:14 Page:297-332
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Teich Jürgen,Thiele Lothar

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference36 articles.

1. Systolic arrays for VLSI;Kung,1978

2. VLSI Processor Arrays;Kung,1987

3. Synthesizing non-uniform systolic designs;Guerra,1986

4. Synthesizing irregular iterative algorithms with array architectures;Mei,1988

5. On the hierarchical design of VLSI processor arrays;Thiele,1988

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