A fast near optimum VLSI implementation of FFT using residue number systems

Author:

Alia G.,Barsi F.,Martinelli E.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference12 articles.

1. A parallel radix-4 fast Fourier transform computer;Corinthios;IEEE Trans. Comput.,1975

2. On the design of a real-time modular FFT processor;Pomerlan;IEEE Trans. Circuit Syst.,1976

3. Implementation of FFT structures using the residue number system;Ben-Dan;IEEE Trans. Comput.,1979

4. A complexity theory for VLSI;Thompson,1980

5. A VLSI residue arithmetic multiplier;Taylor;IEEE Trans. Comput.,1982

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1. Contextuality Supplies the Magic for Quantum Computation;2015 IEEE International Symposium on Multiple-Valued Logic;2015-05

2. Optimal VLSI complexity design for high speed pipeline FFT using RNS;Computers & Electrical Engineering;1998-05

3. Mod m arithmetic in binary systems;Information Processing Letters;1991-12

4. A VLSI modulo m multiplier;IEEE Transactions on Computers;1991-07

5. A VLSI structure forX(modm) operation;Journal of VLSI signal processing systems for signal, image and video technology;1990-04

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