A simple silicon compatible 40nm electroplated copper T-gate process-Reference-Cited by-同舟云学术

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A simple silicon compatible 40nm electroplated copper T-gate process

Published:2014-06 Issue: Volume:121 Page:153-155
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Cao Menglin,Li Xu,Ferguson Susan,Thoms Stephen,MacIntyre Douglas,Thayne Iain

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. D.H. Kim et al., Proc. 2011 IEEE International Electron Device Meeting, 2011, pp. 13.6.1–13.6.4.

2. 30-nm InAs PHEMTs With $f_{T} = \hbox{644}\ \hbox{GHz}$ and $f_{\max} = \hbox{681}\ \hbox{GHz}$

3. T-Shaped Gate GaN HFETs on Si With Improved Breakdown Voltage and $f_{\rm MAX}$

4. R.J.W. Hill et al., Proc. 2010 International Electron Devices Meeting – Technical Digest, 2010, pp. 6.2.1–6.2.4.

5. Double-layer resist films for submicrometer electron-beam lithography

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