1. Noboru Yamada, SPIE v.3109, 1997, pp. 28–37.
2. International Technology Roadmap for Semiconductors (ITRS), 2007. Available from: .
3. Low-cost and nanoscale non-volatile memory concept for future silicon chips
4. F.J. Jedema, M.A.A. in ‘t Zandt, R.A.M. Wolters, D. Tio Castro, G.A.M Hurkx, R. Delhougne, D.J. Gravesteijn, K. Attenborough, in: IEEE-NVMW, 2008.