Desynchronization crisis induced intermittency in a master–slave PLL configuration

Author:

Stavrinides S.G.,Miliou A.N.,Anagnostopoulos A.N.,Konstantakos V.,Magafas L.,Laopoulos Th.

Publisher

Elsevier BV

Subject

General Mathematics,General Physics and Astronomy,Statistical and Nonlinear Physics,Applied Mathematics

Reference23 articles.

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5. A wide-bandwidth low-voltage PLL for PowerPC microprocessors;Alvarez;IEEE J Solid State Circuits,1995

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3. On–off intermittent synchronization between two bidirectionally coupled double scroll circuits;Communications in Nonlinear Science and Numerical Simulation;2010-08

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