Peak temperature reduction by optimizing power density distribution in 3D ICs with microchannel cooling-Reference-Cited by-同舟云学术

Peak temperature reduction by optimizing power density distribution in 3D ICs with microchannel cooling

Published:2017-12 Issue: Volume:79 Page:488-498
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Zając Piotr,Maj Cezary,Napieralski Andrzej

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference24 articles.

1. Design of 3d Integrated Circuits and Systems;Sharma,2014

2. Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures;Xie,2010

3. Evolution, challenge, and outlook of TSV, 3D IC integration and 3d silicon integration;Lau,2011

4. Thermal feasibility of die-stacked processing in memory;Eckert,2014

5. Modeling and dynamic management of 3D multicore systems with liquid cooling;Coskun,2009

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An innovative manifold microchannel heat sink for thermal management of high-power chips with multiple hotspots;Numerical Heat Transfer, Part A: Applications;2024-07-14

2. Thermal management for multi-cores chips through microchannels completely or incompletely filled with ribs;Case Studies in Thermal Engineering;2024-02

3. Thermal–Hydrodynamic Behavior and Design of a Microchannel Pin-Fin Hybrid Heat Sink;Micromachines;2022-12-02

4. A C4.5 decision tree classifier based floorplanning algorithm for System-on-Chip design;Microelectronics Journal;2022-03

5. Fast Thermal Goodness Evaluation of a 3D-IC Floorplan;2021 22nd International Symposium on Quality Electronic Design (ISQED);2021-04-07