Impact of bias condition on 1/f noise of dual-gate depletion type MOSFET in linear region and consequences for noise diagnostic application and modelling

Author:

Videnovic-Misic M.,Jevtic M.M.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference22 articles.

1. IMD reduction in CMOS double-balanced mixer using multibias dual-gate transistors;Au-Yeung;IEEE Trans Microwave Theory Technol,2006

2. A 7-GHz 1.8-dB NF CMOS low-noise amplifier;Fujimoto;IEEE J Solid-State Circ,2002

3. Videnovic-Misic M, Jevtic M. DC conditions and phase noise of Colpitts oscillator with DGMOST. In: Proc of the 24th Int Conf on Microelectron MIEL, vol. 2; 2004. p. 577–80.

4. The design of CMOS radio-frequency integrated circuits;Lee,1998

5. Noise as a diagnostic and prediction tool in reliability physics;Jevtić;Microelectron Reliab,1995

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