1. A 22 nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors;Auth,2012
2. A 14 nm logic technology featuring 2nd-generation FinFET , air-gapped interconnects, self-aligned double patterning and a 0.0588 μm2 SRAM cell size;Natarajan,2014
3. High performance 14 nm SOI FinFET CMOS technology with 0.0174 μm2 embedded DRAM and 15 levels of Cu metallization;Lin,2014
4. Comprehensive analysis of variability sources of FinFET characteristics;Matsukawa,2009
5. 14 nm FDSOI technology for high speed and energy efficient applications;Weber,2014